1. Field of the Invention
The present invention relates to a circuit for generating several clocks at different frequencies. The invention more specifically applies to the realization of a frequency synthesizer adapted for integration in a circuit, the operation of which requires the use of several clocks synchronized on a same reference frequency.
2. Discussion of the Related Art
As an example of application, a synthesizer according to the invention can be integrated in a decoder of video and audio signals compressed according to a so-called MPEG standard for display on a television set. Such a decoder requires several clocks for the different blocks it includes and all these clocks have to be synchronized on a reference frequency. For example, two first clocks ere for an audio decoding block, a third clock is for a video decoding block, a fourth clock is for a display generating block, etc. All these clocks have different frequencies included, for instance, between 10 and 100 MHz, and have to be synchronized on a same reference frequency, for instance a sampling frequency of the image pixels of some ten MHz.
Conventionally, these clocks are generated outside the MPEG decoder and separately by assigning a phase-locked loop (PLL) to each frequency to be generated.